The invention relates to an address supply unit for a memory and, more particularly, to an address supply unit for a memory to be refreshed and a memory storing data to be periodically read out.
A memory which is widely used and which requires refreshing is a dynamic type RAM (random access memory) which is refreshed in the manner as described in "Memory Design Handbook" published in 1977 by Intel Corporation, pp. 2-4 to 2-8, for example.
A memory for storing data to be periodically read out is generally used to store displaying data in a character/symbol display unit. A cycle steal method is generally used to periodically read out data from such a memory, to write data into that memory, or to rewrite the contents of the memory. The cycle steal method is disclosed in "Transistor Technology" (which is a monthly published magazine) published on May, 1977, pp. 215 to 217.
In recent years, rapid progress in LSI (large scale integration) technology has produced a microcomputer in which a central processing unit is formed by a single LSI chip. With the advent of the microcomputer, a system using mainly a CPU has gradually superseded the conventional general digital IC system. Such a system has as major components a CPU, a memory circuit of the read-only type (referred to as a program ROM) for storing the processing programs of the CPU, a memory circuit which is rewritable (referred to as a data RAM) and which temporarlly stores data in the course of the system operation, and an input/output circuit.
When such a system is utilized for a character/symbol display unit, what is first taken into consideration is what type of memory must be used for the data RAM and for the display RAM for storing character/symbol data to be displayed on the screen of a display unit. Generally, the static type RAM is relatively expensive and has a large power consumption and hence is unsuitable for a case requiring a large memory capacity. However, it requires no refreshing operation and thus no additional circuit for refreshing. For this reason, the static type RAM is used for the case where only a small memory capacity is required. On the other hand, the dynamic RAM is suitable for an inexpensive memory of large memory capacity, but the stored information volatilizes with a given lapse of time. Therefore, the dynamic type RAM must be refreshed at given time intervals (2 msec) so that it needs a circuit to generate an address or a refresh request signal for refreshing and a refresh control signal to control the cycle timing of the read and write operation of data in the dynamic RAM with the refreshing operation, and a multiplexer for selecting either an address for refreshing or an address for a read and write operation in accordance with the cycle timing.
The static type RAM and the dynamic type RAM respectively have advantages and disadvantages, as described above, so that those RAMs must be selected in compliance with the requirements of a particular system. When microcomputer system is utilized for the character/symbol display unit, the RAM used as the data RAM must have a relatively large memory capacity since, the amount of data to be stored in the data RAM is great and the memory capacity must be provided with some superfluous capacity. For this, from the point of view of economy, the dynamic type RAM is most suited for use as the data RAM in the character/symbol display unit since the dynamic type RAM is an inexpensive memory of large capacity. On the other hand, a display RAM needs a memory capacity merely corresponding to the display screen in one-to-one relation. Accordingly, the static type RAM is suitable for use as the display RAM. Thus, in the conventional character/symbol display units, in general, the dynamic type RAM is used as the data RAM and the static RAM is used as the display RAM in order to provide inexpensive memory units. Of course, it is also known to use a dynamic RAM as the display RAM. When the dynamic type RAM is used for the data RAM and the static type RAM for the display RAM, there is a need for a refresh control circuit to refresh the data RAM and a multiplexer, and for supplying a signal to hold data within the data RAM so that it is not outputted onto the data bus and to prohibit the CPU from making access to the data RAM. Accordingly, during the refreshing operation, the CPU must stop its data processing operation so that the processing speed of the CPU is reduced. On the other hand, since the display RAM is read out by the cycle steal system, it is provided with a multiplexer for periodically selecting an address for periodic read-out and an address for write or erase delivered from the CPU.
In such a microcomputer system with the static type RAM storing data to sequentially and periodically be read out and the dynamic type RAM requiring the refresh operation, such as a character/symbol display unit, many additional circuits are required. As a result, the system is expensive and the system control is complicated and the processing speed of the CPU is reduced.